VHDL Crash Course: A Multimedia-Based Teaching Approach

Content and motivation

Modern applications such as artificial intelligence or image processing for autonomous driving require more and more computing power. Tailored high-performance hardware platforms are therefore essential to meet the requirements of these applications. For this reason, the ability to design complex digital hardware at register transfer level (RTL) using a Hardware Description Language (HDL) such as VHDL is a very important skill for future electrical engineers. Furthermore, since VHDL is a widely used industry standard, mastering this language allows for an easier transition into the professional world, where many projects rely on this HDL.

However, learning VHDL is a challenge due to its nature of being an HDL. Students must move from conventional programming paradigms to an RTL mindset, which requires a shift from sequential to concurrent thinking. As a result, students find it difficult to learn VHDL and understand the syntax compared to conventional programming languages such as C++ or Java. Only after a period of practice do most students have a basic understanding of the HDL. 

In our Digital Hardware Design Lab (DHL), we observe a great heterogeneity among the students in terms of prior knowledge of VHDL at the beginning of each semester, which makes tutoring difficult. To address this challenge, we produced a VHDL crash course to prepare students for a lab course, which consists of instructional videos and corresponding online exercises.

The crash course also serves as a refresher to prepare Master's students to apply their theoretical knowledge in practical exercises. Compared to already freely available tutorials, our instructional videos are based on a learning theory (Cognitive-Affective Theory of Learning with Media; CATLM) to achieve better learning success. Thereby, the main goal of these videos is to introduce the most important basic concepts and to show short examples to give the students an insight into the use of VHDL. 

Further information

The course consists of nine modules and is taught entirely in English. It is of particular interest to graduates of the courses „Praktikum Entwurf digitaler Systeme“ and „Digital Hardware Design Laboratory“.

The videos were conceived and produced by Fabian Kreß, who also presents the content as a moderator. He was supported during the filming in the ITIV video studio by Iuliia Topko and Vladimir Sidorenko. All three are doctoral students in Prof. Becker's team.

The teaching videos will be presented at the IEEE German Education Conference (GECon) 2024 in Munich from August 5 to 8, 2024. Under the motto "Networking Education in Germany", the hybrid conference will provide a platform to discuss teaching concepts and methods in German academic institutions, including universities, universities of applied sciences and distance learning universities.

Click here for the playlist of instructional videos on Youtube.