Research

Data Flow Processing for DAQ Systems

New advances in the field of telecommunications are leading to increasing demands on the bandwidth of digital signal processing. New standards are capable of transmitting sub-terabit data rates. Characterization of such systems requires processing, validation and storage of the generated measurement data. Stream processors play a key role in the development of data acquisition systems (DAQ systems). At ITIV, we aim to develop a framework for reconfigurable DAQ systems that will enable the specification of future transmission standards.

Implementation of GNNs on Hardware Accelerators

Graph Neural Networks (GNNs) extend conventional deep learning methods to graphical structures. Their generalized formulation opens up new possibilities in application areas such as image processing, monitoring or network analysis. Especially when implementing them in real-time applications, bandwidth and memory latency are significant bottlenecks. Therefore, the use of reprogrammable hardware platforms such as FPGAs is a central topic in current studies. At ITIV, we are trying to improve the usability of GNNs in embedded systems.

Data-driven design of trigger systems

Particle accelerators generate huge amounts of data during their experiments and therefore require so-called trigger systems. These systems implement filter mechanisms to distinguish between relevant and irrelevant detector events. Varying hyperparameters during physics experiments require automated training and reconfiguration of the firmware in the detector. Here at ITIV, we are investigating measures to adapt latency-optimized trigger systems to changing environmental variables.

Teaching

LV 231162 Practical course System-on-Chip

Student Work
Title	Type
Decoding Decay - Real-Time Particle Detection from Point Clouds	Masterarbeit
Compiler-Based Integration of Neural Network Accelerators	Masterarbeit

HIWI Jobs
Title
Empowering Tomorrow's Engineers: MLIR-Based Toolchain for Transforming Python Neural Networks into Verilog Hardware

Publications

2024

Journal Articles

Real-Time Graph Building on FPGAs for Machine Learning Trigger Applications in Particle Physics
Neu, M.; Becker, J.; Dorwarth, P.; Ferber, T.; Reuter, L.; Stefkova, S.; Unger, K.
2024. Computing and Software for Big Science, 8 (1), Artl.Nr.: 8. doi:10.1007/s41781-024-00117-0

Conference Papers

An Advanced Concept for Coherent Ultra-Low Phase-Noise Clock, LO and Trigger Generation & Distribution in 6G Massive-MIMO Systems
Scheder, A.; Witte, L.; Rottinghaus, J.; Gröschel, P.; Karle, C.; Neu, M.; Nuss, B.; Vossiek, M.
2024. 54th European Microwave Conference (EuMC 2024), 996–999, Institute of Electrical and Electronics Engineers (IEEE). doi:10.23919/EuMC61614.2024.10732511

A Dynamically Pipelined Dataflow Architecture for Graph Convolutions in Real-Time Event Interpretation
Neu, M.; Karle, C.; Schmidt, P.; Höfer, J.; Harbaum, T.; Becker, J.
2024. IEEE 37th International System-on-Chip Conference (SOCC 2024), 6 S., Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/SOCC62300.2024.10737798

Scalable Multi-Level Synchronization Technique of Distributed Multi-RFSoC-Server Systems for 6G
Karle, C.; Neu, M.; Nuss, B.; Witte, L.; Scheder, A.; Waldner, E.; Shkurtaj, E.; Harbaum, T.; Becker, J.
2024. IEEE 37th International System-on-Chip Conference (SOCC 2024), 6 S., Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/SOCC62300.2024.10737777

Modular Hardware Design for High-Performance MIMO-Capable SDR Systems to Accelerate 6G Development
Karle, C.; Neu, M.; Nuss, B.; Chen, J.; Witte, L.; Scheder, A.; Harbaum, T.; Becker, J.
2024. IEEE 37th International System-on-Chip Conference (SOCC 2024), 6 S., Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/SOCC62300.2024.10737765

2023

Book Chapters

A Convolution Neural Network Based Displaced Vertex Trigger for the Belle II Experiment
Unger, K.; Becker, J.; Kiesling, C.; Ma, Y.; Meggendorfer, F.; Neu, M.; Schmidt, E.; Zweigart, U.
2023. Applied Reconfigurable Computing. Architectures, Tools, and Applications – 19th International Symposium, ARC 2023, Cottbus, Germany, September 27–29, 2023, Proceedings. Ed.: F. Palumbo, 173–184, Springer Nature Switzerland. doi:10.1007/978-3-031-42921-7_12

Journal Articles

Data-driven design of the Belle II track segment finder
Unger, K. L.; Neu, M.; Becker, J.; Schmidt, E.; Kiesling, C.; Meggendorfer, F.; Skambraks, S.
2023. Journal of Instrumentation, 18 (2), Art.-Nr.: C02001. doi:10.1088/1748-0221/18/02/C02001

Conference Papers

A Scalable and Cost-Efficient Antenna Testbed Using FPGA-Server Compound Structures for Prototyping 6G Applications
Neu, M.; Karle, C.; Nuss, B.; Groeschel, P.; Becker, J.
2023. 2023 19th International Conference on Distributed Computing in Smart Systems and the Internet of Things (DCOSS-IoT), 171–178, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/DCOSS-IoT58021.2023.00039

A Unified SoC Lab Course: Combined Teaching of Mixed Signal Aspects, System Integration, Software Development and Documentation
Pfau, J.; Leys, R.; Neu, M.; Serdyuk, A.; Peric, I.; Becker, J.
2023. 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 5 S., Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/ISCAS46773.2023.10181679

ReLoDAQ: Resource-Efficient, Low-Overhead 200 Gbits −1 Data Acquisition System for 6G Prototyping
Karle, C.; Neu, M.; Pfau, J.; Sperling, J.; Becker, J.
2023. 2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 08-11 May 2023, Marina Del Rey, CA, USA, 209, Institute of Electrical and Electronics Engineers (IEEE). doi:10.1109/FCCM57271.2023.00037